Universal Synchronous/Asynchronous Receiver Transmitter (Usart); Serial Peripheral Interface (Spi)/Inter-Integrated Sound Interfaces (I 2 S); Table 6. Comparison Of I2C Analog And Digital Filters - STMicroelectronics STM32F050G6 Manual

STM32F050xx
Table 6.
Pulse width of
suppressed spikes
Benefits
Drawbacks
In addition, I2C1 provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP
capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts
verifications and ALERT protocol management. I2C1 also has a clock domain independent
from the CPU clock, allowing the I2C1 to wake up the MCU from Stop mode on address
match.
The I2C interface can be served by the DMA controller.
3.14 Universal synchronous/asynchronous receiver transmitter
(USART)
The device embeds an universal synchronous/asynchronous receiver transmitters
(USART1), which communicates at speeds of up to 6 Mbit/s.
It provides hardware management of the CTS, RTS and RS485 DE signals, multiprocessor
communication mode, master synchronous communication and single-wire half-duplex
communication mode. It also supports SmartCard communication (ISO 7816), IrDA SIR
ENDEC, LIN Master/Slave capability, auto baud rate feature and has a clock domain
independent from the CPU clock, allowing it to wake up the MCU from Stop mode.
The USART interface can be served by the DMA controller.
3.15 Serial peripheral interface (SPI)/Inter-integrated sound
interfaces (I
The SPI (SPI1) is able to communicate up to 18 Mbits/s in slave and master modes in full-
duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame size is configurable from 4 bits to 16 bits.
One standard I
can operate as master or slave at half-duplex communication mode. It can be configured to
transfer 16 and 24 or 32 bits with16-bit or 32-bit data resolution and synchronized by a
specific signal. Audio sampling frequency from 8 kHz up to 192 kHz can be set by 8-bit
programmable linear prescaler. When operating in master mode it can output a clock for an
external audio component at 256 times the sampling frequency.
Comparison of I2C analog and digital filters
Analog filter
 50 ns
Available in Stop mode
Variations depending on
temperature, voltage, process
2
S)
2
S interface (multiplexed with SPI1) supporting four different audio standards
Doc ID 023079 Rev 3
Functional overview
Digital filter
Programmable length from 1 to 15
I2C peripheral clocks
1. Extra filtering capability vs.
standard requirements.
2. Stable length
Wakeup from Stop on address
match is not available when digital
filter is enabled.
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