Pll Characteristics; Table 36. Low-Power Mode Wakeup Timings; Table 37. Pll Characteristics - STMicroelectronics STM32F050G6 Manual

STM32F050xx
Table 36. Low-power mode wakeup timings
Symbol Parameter
Wakeup from Stop
t
WUSTOP
mode
Wakeup from
t
WUSTANDBY
Standby mode
Wakeup from Sleep
t
WUSLEEP
mode
6.3.8

PLL characteristics

The parameters given in
temperature and supply voltage conditions summarized in
Table 37.
Symbol
f
PLL_IN
f
PLL_OUT
t
LOCK
Jitter
PLL
1. Take care to use the appropriate multiplier factors to obtain PLL input clock values compatible with the
range defined by f
2. Guaranteed by design, not tested in production.
Conditions
Regulator in run
mode
Regulator in low
power mode
Table 37 are derived from tests performed under ambient
PLL characteristics
Parameter
(1)
PLL input clock
PLL input clock duty cycle
PLL multiplier output clock
PLL lock time
Cycle-to-cycle jitter
.
PLL_OUT
Doc ID 023079 Rev 3
Typ @V
= 2.0 V = 2.4 V = 2.7 V
4.2 4.2 4.2
8.05 7.05 6.6
60.35 55.6 53.5
1.1 1.1 1.1
Table
Min
(2)
1
(2)
40
(2)
16
-
-
Electrical characteristics
DD
Max Unit
= 3 V = 3.3 V
4.2 4.2
6.27 6.05
52.02 50.96
1.1 1.1
15.
Value
Typ Max
(2)
8.0 24
(2)
- 60
- 48
(2)
- 200
(2)
- 300
5
9
µs
Unit
MHz
%
MHz
µs
ps
59/98