Table 56. Wwdg Min-Max Timeout Value @48 Mhz (Pclk) - STMicroelectronics STM32F050G6 Manual

STM32F050xx
Table 54.
Symbol
t
COUNTER
t
MAX_COUNT
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3, TIM6, TIM14, TIM15, TIM16 and TIM17
timers.
Table 55.
Prescaler divider
/16
/32
/64
/128
/256
1. These timings are given for a 40 kHz clock but the microcontroller's internal RC frequency can vary from
30 to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the
phasing of the APB interface clock versus the LSI clock so that there is always a full RC period of
uncertainty.
Table 56.
Prescaler
1
2
4
8
(1)
TIMx characteristics (continued)
Parameter
16-bit counter clock period
Maximum possible count
with 32-bit counter
IWDG min/max timeout period at 40 kHz (LSI)
PR[2:0] bits
/4 0
/8 1
2
3
4
5
6 or 7
WWDG min-max timeout value @48 MHz (PCLK)
WDGTB
0
1
2
3
Doc ID 023079 Rev 3
Conditions
f = 48 MHz
TIMxCLK
f = 48 MHz
TIMxCLK
Min timeout RL[11:0]=
0x000
0.1
0.2
0.4
0.8
1.6
3.2
6.4
Min timeout value
0.0853
0.1706
0.3413
0.6826
Electrical characteristics
Min Max
1 65536
0.0208 1365
- 65536 × 65536
- 89.48
(1)
Max timeout RL[11:0]=
0xFFF
409.6
819.2
1638.4
3276.8
6553.6
13107.2
26214.4
Max timeout value
5.4613
10.9226
21.8453
43.6906
Unit
t
TIMxCLK
µs
t
TIMxCLK
s
Unit
ms
Unit
ms
75/98