Sharp JX-8200 Service Manual page 175

SHARP SERVICE MANUAL JX8200SM [13] ELECTRICAL SECTION
g. 16 BIT TRANSPARENT LATCHES
I. FUNCTIONAL BLOCK DIAGRAM
1OE
1LE
D
1D1
1O1
C
TO 9 OTHER CHANNELS
II. PIN CONFIGURATIONS
1OE 1
1O1 2
1O2 3
GND 4
1O3 5
1O4 6
VCC 7
1O5 8
1O6 9
GND 10
1O7 11
1O8 12 SO48-1
SO48-2
2O1 13
2O2 14
GND 15
2O3 16
2O4 17
VCC 18
2O5 19
2O6 20
GND 21
2O7 22
2O8 23
2OE 24
SSOP
TSSOP
TOP VIEW
III. PIN DESCRIPTION
Pin Names
xDx Data Inputs
xLE Latch Enable Input (Active HIGH)
xOE Output Enable Input (Active LOW)
xOx 3-State Outputs
IV. FUNCTION TABLE(1)
Inputs
xDx xLE
H H
L H
X X
NOTE: 1. H = HIGH voltage level
L = LOW voltage level
X = Don't care
Z = High impedance
2OE
2LE
D
2D1
2O1
C
TO 9 OTHER CHANNELS
48 1LE
47 1D1
46 1D2
45 GND
44 1D3
43 1D4
42 VCC
41 1D5
40 1D6
39 GND
38 1D7
37 1D8
36 2D1
35 2D2
34 GND
33 2D3
32 2D4
31 VCC
30 2D5
29 2D6
28 GND
27 2D7
26 2D8
25 2LE
Description
Outputs
xOE xOx
L H
L L
H Z
h. 16 BIT BIDIRECTIONAL TRANSCEIVERS
I. FUNCTIONAL BLOCK DIAGRAM
1DIR
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
II. PIN CONFIGURATIONS
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
III. PIN DESCRIPTION
Pin Names
xOE Output Enable Input (Active LOW)
xDIR Direction Control Input
xAx Side A Inputs or 3-State Outputs(1.2)
xBx Side B Inputs or 3-State Outputs(1.3)
IV. FUNCTION TABLE(1)
Inputs
xOE xDIR
L
L
H
NOTE: 1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
13 – 16
2DIR
1OE
2A1
1B1
2A2
1B2
2A3
1B3
2A4
1B4
2A5
1B5
2A6
1B6
2A7
1B7
2A8
1B8
1 48 1OE
2 47 1A1
3 46 1A2
4 45 GND
5 44 1A3
6 43 1A4
7 42 VCC
8 41 1A5
9 40 1A6
10 39 GND
11 38 1A7
12 SO48-1 37 1A8
SO48-2
13 36 2A1
14 35 2A2
15 34 GND
16 33 2A3
17 32 2A4
18 31 VCC
19 30 2A5
20 29 2A6
21 28 GND
22 27 2A7
23 26 2A8
24 25 2OE
SSOP
TSSOP
TOP VIEW
Description
Outputs
L Bus B Data to Bus A
H Bus A Data to Bud B
X High Z State
2OE
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8