Mitsubishi Electric MELSEC-Q/L Programming Manual page 1065

■Table of the time to be added when file register, extended data register, extended link register,
module access device, and link direct device are used
• When using L02SCPU, L02SCPU-P, L02CPU, L02CPU-P, L06CPU, L06CPU-P, L26CPU, L26CPU-P, L26CPU-BT, and
L26CPU-PBT
Device name
File register (R) When standard RAM is
used
File register (ZR), When standard RAM is
extended data used
register (D),
extended link register
(W)
Module access device (Un\G)
Link direct device (Jn\)
Data Device specification
location
Bit Source
Destination
Word Source
Destination
Double word Source
Destination
Bit Source
Destination
Word Source
Destination
Double word Source
Destination
Bit Source
Destination
Word Source
Destination
Double word Source
Destination
Bit Source
Destination
Word Source
Destination
Double word Source
Destination
Addition time (s)
L02SCPU, L02CPU,
L02SCPU-P L02CPU-P
0.100 0.100
0.220 0.220
0.100 0.100
0.100 0.100
0.200 0.200
0.200 0.200
0.160 0.140
0.320 0.280
0.160 0.140
0.160 0.140
0.260 0.240
0.260 0.240
15.000 11.700
21.300 15.400
10.600 9.460
33.000 19.000
24.200 11.000
34.800 18.800
70.900 41.600
120.100 63.200
68.400 40.700
53.700 31.700
75.600 49.400
58.900 39.600
Appendix 1 Operation Processing Time
L06CPU,
L06CPU-P,
L26CPU,
L26CPU-P,
L26CPU-BT,
L26CPU-PBT
0.048
0.038
0.048
0.038
0.095
0.086
0.057
0.048
0.057
0.048
0.105
0.095
11.200
15.300
9.410
19.000
10.900
A
18.700
37.900
58.100
37.500
30.800
43.400
37.300
APPENDICES
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