Fnc 54 - Hscr / High-Speed Counter Reset - Mitsubishi Electric FX3G SERIES Programming Manual

FX /FX /FX Series Programmable Controllers
3G 3U 3UC
Programming Manual - Basic & Applied Instruction Edition
13.5 FNC 54 – HSCR / High-Speed Counter Reset
Outline
This instruction compares the value counted by a high-speed counter with a specified value at each count, and
immediately resets an external output (Y) when both values become equivalent to each other.
1. Instruction format
FNC 54
D HSCR
2. Set data
Operand Type
S
1
S
2
D
3. Applicable devices
Bit Devices
Oper-
and
Type
X Y
S
1
S
2
D
1: "D .b" is available only in FX
2: The same counter as
3: This function is supported only in FX
Explanation of function and operation
1. 32-bit operation (DHSCR)
When the current value of a high-speed counter (C235 to C255) specified in
[ S +1, S
1 1
comparison value is K200), the bit device
instruction, the comparison processing is executed after the counting processing in the high-speed counter.
Command
input
Operation
When the present value of the high-speed counter C255 changes (counts) from "99" to "100" or from "101" to "100",
Y010 is reset (output refresh).
M8000
RUN
monitor
356
Mnemonic
16-bit Instruction
−
Data to be compared with the current value of a high-speed counter or word device
number storing the data to be compared
Device number of a high-speed counter [C235 to C255]
Bit device number to be reset (set to OFF) when both values become equivalent each
other.
System User Digit Specification
M T C S D .b KnX KnY KnM KnS T C D R U \G
1
and FX
3U
S can be specified also. (Refer to the program example shown later.)
2
3U
] (for example, when the current value changes from "199" to "200" or from "201" to "200" if the
K2,147,483,647
S
2
Comparison Comparison
value source
FNC 54
S S
1
DHSCR
K2,147,483,647
C255
Comparison Comparison
value source
FNC 54
K100 C255
DHSCR
13 High-Speed Processing – FNC 50 to FNC 59
13.5 FNC 54 – HSCR / High-Speed Counter Reset
Operation Condition
Description
Word Devices
Special
System User
Unit
3
2
PLCs. However, index modifiers (V and Z) are not available.
3UC
/FX PLCs.
3UC
is reset (set to OFF) regardless of the operation cycle. In this
D
Output
destination
D S
=
2 1
Output
destination
K100 = C255 → Y010
Y010
Mnemonic
32-bit Instruction
13 steps DHSCR
Real
Index Constant
Number
V Z Modify K H
S becomes the comparison value
2
Reset.
→
S D
2
Reset.
Operation Condition
Continuous
Operation
Data Type
32-bit binary
32-bit binary
Bit
Others
Charac-
Pointer
ter String
E " " P