Mitsubishi Electric FX3G SERIES Programming Manual page 441

FX /FX /FX Series Programmable Controllers
3G 3U 3UC
Programming Manual - Basic & Applied Instruction Edition
3. Confirming the logic of the seven-segment display unit
1) Data input
Logic
Timing chart
Description BCD data at low level
Check
2) Strobe signal
Logic
Timing chart
Description Data latched at low level is held.
Check
4. Setting the parameter "n"
Set a proper value according to the logic (positive or negative) of the PLC and the logic (positive or negative) of the
seven-segment display unit as shown in the table below:
PLC output logic
Negative logic
Positive logic
5. Explanation of the parameter "n" setting method according to an actual example
When the following seven-segment display unit is selected, "n" should be "1" when one display unit is connected (4
digits × 1 set) or "5" when two display units are connected (4 digits × 2 sets).
1) Transistor output of PLC
- Sink output = Negative logic
- Source output = Positive logic
2) Seven-segment display unit
- Data input = Negative logic
- Strobe signal = Positive logic
PLC output logic
Negative logic
Negative logic
D
H
1
D
+1
2
+2
D
4
+3 8
D
Seven-segment
display
Negative logic
D
1
D
+3 8
D D
+4 to +7
H
Change in
strobe display
Nothing
Latch
Data input
Negative logic (match)
Positive logic (mismatch)
Positive logic (match)
Negative logic (mismatch)
Data input
Negative logic (match)
Positive logic (mismatch)
15 External FX I/O Device – FNC 70 to FNC 79
15.5 FNC 74 – SEGL / Seven Segment With Latch
D
H
D
H +1
D
+2
D +3
Seven-segment
display
BCD data at high level
D
H
D
+3
D
+4 to
H
Change in
strobe display
Nothing
Data latched at high level is held.
Strobe signal
4 digits × 1 set
Negative logic (match)
Positive logic (mismatch)
Negative logic (match)
Positive logic (mismatch)
Positive logic (match)
Negative logic (mismatch)
Positive logic (match)
Negative logic (mismatch)
Strobe signal
4 digits × 1 set
Negative logic (match)
Positive logic (mismatch)
Negative logic (match)
Positive logic (mismatch)
Positive logic
H L H L
1
H L
2
H
4
8 H
Positive logic
1 H
8
D
+7 L H L H
Nothing Nothing
Latch
Parameter "n"
4 digits × 2 sets
0 4
1 5
2 6
3 7
0 4
1 5
2 6
3 7
Parameter "n"
4 digits × 2 sets
0 4
1 5
2 6
3 7
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