Setting Of The Stack Bank Selection Register (Sbs); Stack Bank Selection Register Format - NEC PD750004 User Manual

µPD750008 USER'S MANUAL

4.1.2 Setting of the Stack Bank Selection Register (SBS)

The Mk I mode and Mk II mode are switched by stack bank selection register. Figure 4-1 shows the register
configuration.
The stack bank selection register is set with a 4-bit memory operation instruction. To use the CPU in Mk
I mode, initialize the register to 10xxB
Note
initialize it to 00xxB
Address
F84H
Note Specify the desired value in xx.
Caution The CPU operates in Mk I mode after the RESET signal is issued, because bit 3 of SBS
is set to 1. Set bit 3 of SBS to 0 (Mk II mode) to use the CPU in Mk II mode.
4 6
Note
at the beginning of the program. To use the CPU in Mk II mode,
.
Figure 4-1. Stack Bank Selection Register Format
3 2 1
SBS3 SBS2 SBS1 SBS0
0 Symbol
SBS
Stack area designation
0
0
Other settings are inhibited
Bit 2 must be set to 0
Mode switching designation
0
1
0 Memory bank 0
1 Memory bank 1
Mk II mode
Mk I mode