(4) Signals
Figure 5-45 shows operations of RELT and CMDT.
SO latch
RELT
CMDT
(5) Switching between MSB and LSB as the first transfer bit
The three-wire serial I/O mode has a function that can switch between the MSB and LSB as the first bit
of transfer.
Figure 5-46 shows the configuration of shift register (SIO) and internal bus. As shown in Figure 5-46,
read or write operation can be performed by switching between the MSB and LSB.
This switching can be specified using bit 2 of serial operation mode register (CSIM).
Internal bus
LSB first
MSB first
SI
SO
SCK
The first bit is switched by changing the order of data bits written to shift register (SIO). The shift operation
order of SIO is always the same.
Accordingly, the first bit must be switched between the MSB and LSB before writing data to the shift
register.
Figure 5-45. Operations of RELT and CMDT
Figure 5-46. Transfer Bit Switching Circuit
7
6
1
0
Read/write gate
Shift resister (SIO)
CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
Read/write gate
SO latch
D
Q
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