Addressing Modes - NEC PD750004 User Manual

Addressing mode
1-bit direct mem.bit
addressing
4-bit direct mem
addressing
8-bit direct
addressing
4-bit register @HL
indirect @HL+
addressing @HL–
@DE
@DL
8-bit register @HL
indirect
addressing
Bit fmem.bit
manipulation
addressing
pmem.@L
@H+mem.bit
Stack addressing
CHAPTER 3 FEATURES OF THE ARCHITECTURE AND MEMORY MAP
Table 3-1. Addressing Modes
Representation
format
Bit specified by bit at the address specified by MB and mem.
• When MBE = 0 and
mem = 00H-7FH,
mem = 80H-FFH,
• When MBE = 1,
Address specified by MB and mem.
• When MBE = 0 and
mem = 00H-7FH,
mem = 80H-FFH,
• When MBE = 1,
Address specified by MB and mem (mem: even address).
• When MBE = 0 and
mem = 00H-7FH,
mem = 80H-FFH,
• When MBE = 1,
Address specified by MB and HL.
In this case, MB = MBE·MBS
HL+ automatically increments the L register after addressing.
HL– automatically decrements the L register after addressing.
Address specified by DE in memory bank 0
Address specified by DL in memory bank 0
Address specified by MB and HL. (Contents of the L register is
an even address.)
In this case, MB = MBE·MBS
Bit specified by bit at the address specified by fmem.
In this case,
fmem =
Bit specified by the low-order two bits of the L register
at the address specified by the high-order 10 bits of pmem and the
high-order two bits of the L register.
In this case, pmem = FC0H-FFFH
Bit specified by bit at the address specified by MB, H, and the low-
order four bits of mem.
In this case, MB = MBE·MBS
— Address specified by the SP in memory bank selected by the SBS
Specified address
MB = 0
MB = 15
MB = MBS
MB = 0
MB = 15
MB = MBS
MB = 0
MB = 15
MB = MBS
FB0H-FBFH (interrupt-related hardware)
FF0H-FFFH (I/O ports)
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