Release Of The Standby Modes - NEC PD750004 User Manual

4 bit single-chip microcomputer
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Caution 2. Reset all the interrupt request flags before setting the standby mode. If an interrupt
source whose interrupt request flag and interrupt enable flag are both set exists, the
initiated standby mode is released immediately after it is set (see Figure 6-1). When
the STOP mode is set, however, the µPD750008 enters the HALT mode immediately
after the STOP instruction is executed, then returns to the operation mode after the
wait time specified by the BTM register has elapsed.

7.2 RELEASE OF THE STANDBY MODES

The STOP mode and HALT mode are released by a RESET signal or the generation of an interrupt request
signal that is enabled with the interrupt enable flag. Figure 7-1 shows how the STOP and HALT modes are
released.
(a) Release of the STOP mode by RESET signal
RESET
signal
Operating
mode
Oscillation
Clock
(b) Release of the STOP mode by the occurrence of an interrupt
Standby
release
signal
Operating
mode
Oscillation
Clock
Note The following two wait times can be selected by a mask option:
17
2
/f
(21.8 ms at 6.00 MHz, 31.3 ms at 4.19 MHz)
X
15
2
/f
(5.46 ms at 6.00 MHz, 7.81 ms at 4.19 MHz)
X
However, the µPD75P0016 does not have a mask option and its wait time is fixed to 2
Remark The dashed line indicates the case where the interrupt request that releases the standby mode
is accepted.
Figure 7-1. Standby Mode Release Operation (1/2)
STOP instruction
STOP mode
No oscillation
STOP instruction
STOP mode
No oscillation
CHAPTER 7 STANDBY FUNCTION
Note
Wait
HALT mode
Oscillation
Wait
(Time set by BTM)
HALT mode
Oscillation
Operating
mode
Operating
mode
15
/f
.
X
217
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