Interrupt Sequence - NEC PD750004 User Manual

6.4 INTERRUPT SEQUENCE

When an interrupt occurs, it is processed using the procedure shown in Figure 6-7.
Save contents of PC and PSW in stack memory and set data
corresponding to activated VRQn to PC, RBE, and MBE.
Change contents of IST0 and IST1 from 00 to 01
or from 01 to 10.
Jump to the start address for processing the interrupt service program.
Notes 1. IST0 and IST1 are the interrupt status flags (bits 3 and 2 of the PSW). (See Table 6-3.)
2. An interrupt service program start address and MBE and RBE setting values at the
start of interrupt are stored in each vector table.
Figure 6-7. Interrupt Sequence
Interrupt (INTxxx) occurrence
IRQxxx setting
IExxx set?
Yes
Corresponding VRQn occurrence
IME = 1
Yes
Is
VRQn high-order
interrupt?
Yes
Note 1
IST1, 0 = 00 or 01
Yes
Reset accepted IRQxxx.
See Section 6.6 when those interrupt
sources share vector address.
CHAPTER 6 INTERRUPT AND TEST FUNCTIONS
No
Hold until IExxx is set.
No
Hold until IME
is set.
No
No
IST1, 0 = 00
If two or more VRQns occur, select
one VRQn according to Table 6-1.
Selected
VRQn
Note 2
in vector table
Hold until process-
ing being executed
is finished.
No
Note 1
Yes
Remaining
VRQns
195