Baseband Processing Printed Circuit Card - Comtech EF Data DMD50 Installation And Operation Manual

DMD50 Universal Satellite Modem
In the modulator, analog in-phase (I) and quadrature (Q) signals are generated on the Digital
Baseband Printed Circuit Card, routed to the L-Band/IF Printed Circuit Card, and modulated at
the desired frequency. The L-Band or 70/140 modulated signal is then passed through a
microprocessor controlled variable attenuator providing gain control of the output signal.
In the complex downconverter, the signal for demodulation is amplified and sent through a
variable wideband attenuator for AGC. The gain-controlled signal is then passed through a
complex downconverter to a low IF.

3.1.2 Baseband Processing Printed Circuit Card

The advent of million-plus gate count FPGAs, advanced logic synthesis tools, and DSPs
providing hundreds of MIPs enabled the design of a software configurable modem. Large, fast
FPGAs now provide designers with what is essentially an on the fly programmable ASIC. High
speed, complex digital logic functions that previously could only be implemented in dedicated
integrated circuits are now downloaded from a micro-controller through a serial or peripheral
interface. When a new digital logic function is needed, a new configuration file is loaded into the
FPGA. There is no limit to the number of digital logic configurations available to the FPGA,
aside from the amount of Flash memory available to the system microprocessor for storage of
configuration files.
The Baseband Processing Printed Circuit Card provides a flexible architecture that allows many
different modes of terrestrial and satellite framing, various FEC options, digital voice processing,
and several different modulation/demodulation formats. Also included on the Baseband Printed
Circuit Card are three synchronous interfaces, an EIA-530 Interface supporting RS-422, V.35,
and RS-232. All three interfaces are provided on the same DB-25 Connector, and are selectable
from the front panel.
MN-DMD50– Revision 3
Figure 3-2. IF Card Block Diagram
Theory of Operation
3–2