Baseband Processing Printed Circuit Card; Figure 3-3. Dmd1050Ts Baseband Processing Card Block Diagram - Comtech EF Data DMD1050TS Installation And Operation Manual

3.1.2 Baseband Processing Printed Circuit Card

The advent of million-plus gate count Field-programmable Gate Arrays (FPGAs), advanced logic
synthesis tools and Digital Signal Processors (DSPs) providing hundreds of Microprocessor
without Interlocked Pipeline Stages (MIPs) supported the design of a software-configurable
modem. Large, fast FPGAs now provide designers with what is essentially an on-the-fly
programmable Application-specific Integrated Circuit (ASIC).
High speed, complex digital logic functions that previously could only be implemented in
dedicated integrated circuits, are now downloaded from a micro-controller through a serial or
peripheral interface. When a new digital logic function is needed, a new configuration file is
loaded into the FPGA. There is no limit to the number of digital logic configurations available to
the FPGA, aside from the amount of Flash memory available to the system microprocessor for
storage of configuration files.
The DMD1050TS Baseband Processing Printed Circuit Card provides a flexible architecture that
allows many different modes of terrestrial and satellite framing, various Forward Error Correction
(FEC) options, digital voice processing and several different modulation/demodulation formats.
Also included on the Baseband Printed Circuit Card are a MIL-188-114A/RS-422 synchronous
interface and a two-port 10/100 Ethernet Bridge interface.
Analog I Unfilter
Analog I Inv Unfilter
Analog Q Unfilter
Analog Q Inv Unfilter
Analog I Unfilter
Analog I Inv Unfilter
Analog Q Unfilter
Analog Q Inv Unfilter

Figure 3-3. DMD1050TS Baseband Processing Card Block Diagram

Theory of Operation
Ethernet
Ethernet
Terminal
RLLP
Fault
Relays
(DB9)
AGC
SPI Bus
Analog I Filter
Alias
ADC I
Filter Analog I Inv Filter
Analog Q Filter
Alias
Q
ADC
Filter Analog Q Inv Filter
Buffers
Terrestrial Data
Buffers
Terrestrial Data
Buffers Terrestrial Data
Analog I Filter
Alias
I
ADC
Filter Analog I Inv Filter
Analog Q Filter
Alias
ADC Q
Filter Analog Q Inv Filter
I/Q
2 x
r2r
TP
3–3
DMD1050TS Satellite Modem Board
25 MHz
Xtal
PHY
DAC
SPI Bus
Serial
ADC
EEPROM
Tx
SCT LPF R2R LPF DAC
Clk
Modulator
FPGA
Mem Space DMA
Buffers
40 MHz
Drop DSP
TPC Codec
40 MHz
Insert DSP
Buf
Buffers
SRAM
Mem Space DMA
SCT
R2R
LPF
Demodulator
FPGA
Revision 1
Compact
Flash
PCMCIA
SCC2
Controller
SMC2
SCC3
Battery
GPIO
Xtal
SPI
10 Mhz
uProc
OCXO
Bus
40
PLL
MHz
x2
Boot
Flash
8 Mbx8
SDRAM
2 x
256 Mbx16
80 MHz
MN-DMD1050TS