Revision Guide for AMD Family
h Models
h- Fh Processors
Rev
October
Performance Counter for Instruction Cache Misses Does
Not Increment for Sequential Prefetches
Description
PMCx
Instruction Cache Misses does not increment for L instruction cache misses that are due to
sequential prefetches
Potential Effect on System
Performance monitoring software may undercount instruction cache misses
Suggested Workaround
Performance monitoring software may use the difference of PMCx
and PMCx
as a close approximation
of instruction cache misses
Fix Planned
Yes
Product Errata