Cache Testing; Smm Issues - AMD -K6-2/450 - MHz Processor Application Note

Embedded amd-k6 processors bios design guide
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23913A/0—November 2000

Cache Testing

SMM Issues

BIOS Consideration Checklist
Preliminary Information
The AMD-K6 family of processors does not contain MSRs to
allow for testing of the L1 cache. However, the AMD-K6-2E+,
AMD-K6-III, and AMD-K6-IIIE+ processors do contain an
MSR that allows for testing of their L2 caches. This MSR is
called L2AAR, and it is described in "Level-2 Cache Array
Access Register (L2AAR)" on page 40.
The System Management Mode (SMM) functionality of the
processor is the same as the Pentium
Implement the processor SMM state-save area in a similar
manner as Pentium processors except for the IDT Base and
possibly Pentium processor-reserved areas. See "System
Management
Mode
information.
Embedded AMD-K6™ Processors BIOS Design Guide
®
(SMM)"
on
processor.
page
13
for
more
7

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