High-speed counter/pulse output control flag area of FP-X0
High-speed counter control flag monitor area
Channel No.
CH0
CH1
CH2
CH3
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Control code flag monitor area
DT90370
DT90371
DT90372
DT90373
The area DT90052 for writing channels
-
and control codes is allocated as shown in
the left figure.
Control codes written with an F0 (MV)
-
instruction are stored by channel in
special data registers DT90370 to
DT90373.
Note) In the reset input setting, the reset
input allocated in the high-speed counter
setting of the system registers are defined
to "enable/disable".