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ML630 Board Features and Operation
This chapter describes the components, features, and operation of the ML630 Virtex®-6
HXT FPGA Optical Transmission Network (OTN) evaluation board. The ML630 board
provides the hardware environment for characterizing and evaluating the GTX and GTH
transceivers available on the Virtex -6 XC6VHX565T-2FFG1924C FPGA.
ML630 Board Features
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The ML630 board block diagram is shown in
ML630 Board User Guide
UG828 (v1.0) September 28, 2011
Two Virtex-6 XC6VHX565T-2FFG1924C FPGAs
On-board power regulators for all necessary voltages with power status LEDs
All ML630 FPGA U1 and U2 I/O banks V
Two types of external power supply jacks (12V "brick" DIN4 type, PC ATX type)
USB JTAG configuration port for use with USB A-to-Mini-B cable
System ACE™ controller with companion CompactFlash socket
General purpose pushbutton and DIP switches, LEDs, and test I/O header for each
FPGA
VGA 2X5 male debug header for each FPGA
USB-to-UART bridge with USB Mini-B pcb connector for each FPGA
Two VITA 57.1 FMC HPC connectors
2
I
C bus hosting EEPROM, clock sources and FMC connectors
A separate SiTime fixed 200 MHz 2.5V LVDS oscillator wired to each FPGAs global
clock inputs
Eight pairs of differential clock input SMA connectors
2
Six I
C programmable Silicon Labs Si570 3.3V LVPECL 10 MHz to 810 MHz
oscillators
Two differential input 8X8 crosspoint switches providing 16 selectable differential
clock sources
Four sets of plug and receptacle FCI Airmax 120 pin connectors implementing the
Interlaken interconnect protocol
Caution!
The ML630 board can be damaged by electrostatic discharge (ESD). Follow
standard ESD prevention measures when handling the board.
www.xilinx.com
Chapter 1
voltage is 2.5V
CCO
Figure
1-1.
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