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Block Diagram
A block diagram of the VCU128 evaluation board is shown in the following figure.
PCIE_EP_TX/RX[0:3]
PCIE_CLK2
PCIE_EP_TX/RX[4:7]
PCIE_EP_TX/RX[8:11]
PCIE_CLK1
PCIE_EP_TX/RX[12:15]
INIT LED
DONE LED
PROG_B PB
1.5V BATT.
QSPI 2Gb
36-bit QDR-IV SDRAM 4Mx36 Dual-Port
Board Features
The VCU128 evaluation board features are listed here. Detailed information for each feature is
provided in
Chapter 3: Board Component
• Virtex
®
UltraScale+™ XCVU37P-2FSVH2892E device
• Zynq
®
-7000 SoC XC7Z010 based system controller
• 4.5 GB DDR4 72-bit component memory interface (4.5 x [512 Mb x 16])
UG1302 (v1.1) April 21, 2021
VCU128 Board User Guide
Figure 1: Evaluation Board Block Diagram
36-bit QDR-IV SDRAM
(shown at banks 68, 69)
36-bit DQB-port
235
70
71
not used
234
not used
233
not used
232
not used
231
not used
230
not used
229
not used
228
not used
227
226
225
HBM_43_PWR
224
0
69
68
HBM_83
Not
used
36-bit DQA-port + common
CY7C4142KV13_106FCXC
36-bit DQB-port
Bank 70
FMCP HSPC
72-bit RLD-3 (2x32Mx36)
LA[00:33]
MT44K32M36RB-107E
72
75
74
73
0
XCVU37P-FSVH2892
NC
HBM_43_PWR
67
64
HBM_43
65
Not
used
72-bit DDR4 Comp. Memory
GPIO 1.8V
MT40A512M16LY-075E
ENET
LED[0:7]
PL_I2C0 BUS
UART0, UART1
QSFP1, QSFP4 CTRL
SMA_CLK OUT(P/N)
SYSCTLR_UCA1 (TX/RX)
Descriptions.
Send Feedback
Chapter 1: Introduction
QSFP1 TX/RX[1:4]
Not used
QSFP1_SI570_CLOCK
Not used
QSFP2 TX/RX[1:4]
QSFP2_SI570_CLOCK
135
SI5328_CLOCK1
QSFP3 TX/RX[1:4]
134
QSFP3_SI570_CLOCK
133
SI5328_CLOCK2
not used
132
QSFP4 TX/RX[1:4]
QSFP4_SI570_CLOCK
131
SMA_REFCLK_INPUT
130
not used
FMCP_HSPC_DP[20:23]
129
FMCP_HSPC_GBTCLK5
128
FMCP_HSPC_DP[16:19]
127
FMCP_HSPC_GBTCLK4
126
FMCP_HSPC_DP[12:15]
FMCP_HSPC_GBTCLK3
125
FMCP_HSPC_DP[8:11]
FMCP_HSPC_GBTCLK2
124
FMCP_HSPC_DP[4:7]
FMCP_HSPC_GBTCLK1
66
FMCP_HSPC_DP[0:3]
FMCP_HSPC_GBTCLK0
System Controller
(4.5X512MX16)
XC7Z010CLG225
GPIO
www.xilinx.com
X21647-112818
6
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