Interrupt Controller; Clock Generator; Dma Controller - Intel 80386 Reference Manual

SYSTEM OVERVIEW
1.3 INTERRUPT CONTROLLER
The 8259A Programmable Interrupt Controller manages interrupts for an 80386 system.
Interrupts from as many as eight external sources are accepted by one 8259A; as many as
64 requests can be accommodated by cascading several 8259A chips. The 8259A resolves
priority between active interrupts, then interrupts the processor and passes a code to the
processor to identify the interrupting source. Programmable features of the 8259A allow it
to be used in a variety of ways to fit the interrupt requirements of a particular system.
1.4 CLOCK GENERATOR
The 82384 Clock Generator generates timing for the 80386 and its support components.
The 82384 provides both the 80386 clock (CLK2) and a half-frequency clock (CLK) to
indicate the internal phase of the 80386 and to drive 80286-compatible devices that may be
included in the system. It can also be used to generate the RESET signal for the 80386 and
other system components. Both CLK2 and CLK are used throughout this manual to describe
execution times.
1.5 DMA CONTROLLER
A DMA (Direct Memory Access) controller performs DMA transfers between main memory
and an I/O device, typically a hard disk,floppy disk, or communications channel. In a DMA
transfer, a large block of data can be copied from one place to another without the interven-
tion of the CPU.
The 82258 Advanced DMA (ADMA) Controller offers four channels and provides all the
signals necessary to perform DMA transfers. Other features of the 82258 are as follows:
• Command chaining to perform multiple commands
• Data chaining to scatter data to separate memory locations (separate pages, for example)
and gather data from separate locations
• Automatic assembly and disassembly to convert from 16-bit memory to 8-bit I/O, or
vice versa
• Compare, translate, and verify functions
• The option to replace one of the four high-speed channels with as many as 32 lower-speed,
multiplexed channels.
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