Comtech EF Data SDM-100A Installation And Operation Manual page 119

Satellite modem
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SDM-100A Satellite Modem
The data signal passes to the convolutional encoder.
If the modulator is in the QPSK mode, the data will be split into two separate data
streams to drive the in-phase and quadrature channels of the modulator.
From the encoder, the data signal passes through a set of variable rate digital Nyquist
filters. There are two identical Nyquist filters:
The digital Nyquist filters are followed by Digital-to-Analog (D/A) converters and
reconstruction filters, which provide spectral shaping and equalization. The filters are
controlled by the M&C, so symbol rates up to 128 ks/s can be achieved without requiring
the filter to be changed.
The I&Q filtered data signals are applied to the RF modulator, which converts them to a
modulated carrier. The spectral shape will be identical to that of the input data streams,
but double-sided about the carrier frequency.
The RF synthesizer provides the proper frequencies to convert the modulator IF to the
desired output frequency in the 50 to 180 MHz range. The synthesizer has multiple loops,
and incorporates a Direct Digital Synthesizer (DDS) chip to accommodate 2.5 kHz steps
over a range of 130 MHz. The RF section has a frequency stability of
The signal from the power combiner is sent to the output amplifier, which takes the low-
level signal from the modulator section and amplifies it to the proper level for output
from the module. It contains circuitry which provides programmable control of the output
level over a range of -5 to -30 dBm, in 0.1 dB steps, and power leveling
maintain the stability of the output level over time and temperature.
When the modulator is in the BPSK mode, the I&Q data are MUXed together, and output
as a single data stream. The select line determines which channel (I or Q) is output first.
Rev. 0
For Viterbi codes, the convolutional encoder encodes the data at rate 1/2. If the
selected code rate is 3/4, then two of every six symbols are punctured out. For
every three data bits in, there are four bits out.
For sequential encoding, the convolutional encoder generates the parity bits from
the input data stream that allows for error correction at the far end of the link.
The rate of the encoder may be 7/8, 3/4, or 1/2. This means, for example, that for
7/8 rate, 8 bits are output for every 7 bits input.
One for the in-phase channel
One for the quadrature channel
Theory of Operation
±
1 x 10
.
-5
1 dB to
±
4–3

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