Figure 4-4. Viterbi Decoder Block Diagram - Comtech EF Data SDM-100A Installation And Operation Manual

Theory of Operation
A set of "branch metric" values is then computed for each of the received symbol pairs,
related to the probability that the received symbol pair was actually transmitted as one of
the four possible symbol pairs. The "branch metrics" are then processed by the
Add-Select-Compare (ASC) computer.
The ASC computer makes decisions about the most probable transmitted symbol stream
by processing the current branch metrics with the state metrics computed for the 64
previous decoder inputs. The results of the ASC computer are stored in memory called
"path memory."
Path memory is 80 states in depth. The path with the maximum metric is designated the
survivor path, and its data is used for output. The difference between the minimum and
maximum path metrics is used as the means of determining decoder synchronization. The
data may then be descrambled and differentially decoded. Both of these processes are
optional and may be selected by the user locally or remotely. The data signal out of the
differential decoder is sent to the interface card for formatting and output.
The synchronization signal is used for Lock Detect and sent to the M&C. The raw BER
count is generated from the minimum and maximum metrics, and sent to the M&C for
further processing.
MICRO-
MICROCOMPUTER
COMPUTER
BUS
I CHANNEL
PROCESSOR
Q CHANNEL
FREQUENCY
LOCKED LOOP
4–8
INTERFACE
DEPUNCTURE
PROCESSOR
AMBIGUITY
RESOLVER
INPUT
BUFFER
COSTAS
CLOCK
RECOVERY

Figure 4-4. Viterbi Decoder Block Diagram

VITERBI DECODER INCLUDING
V.35 DESCRAMBLER AND
CHANNEL BER DETECTION
SDM-100A Satellite Modem
LOCK
DETECT
RECEIVE
DATA
RECEIVE
CLOCK
AGC
CONTROL
DDS RCVR
IF
Rev. 0