Figure 3-14. Three-Wire Bus Arbitration Timing Diagram; Figure 3-15. Two-Wire Bus Arbitration Timing Diagram - Motorola MC68306 User Manual

CLK
FC2–FC0
A31–A1
AS
LDS/ UDS
R/W
DTACK
D15–D0
BR
BG
BGACK
PROCESSOR

Figure 3-14. Three-Wire Bus Arbitration Timing Diagram

S0 S2 S4
S6
CLK
FC2–FC0
A19–A0
AS
DS
R/W
DTACK
D7–D0
BR
BG
PROCESSOR

Figure 3-15. Two-Wire Bus Arbitration Timing Diagram

MOTOROLA
DMA DEVICE
S0 S2 S4 S6 S0 S2 S4 S6
S0 S2 S4 S6
DMA DEVICE
MC68306 USER'S MANUAL
PROCESSOR
PROCESSOR
DMA DEVICE
DMA DEVICE
3- 15