Package C-State Entry And Exit; Coordination Of Core Power States At The Package Level - Intel Xeon Processor E5-1600 Datasheet

Power Management
Table 4-9.

Coordination of Core Power States at the Package Level

Package C-State
Notes:
1. The package C-state will be C1E if all actives cores have resolved a core C1 state or higher.
Figure 4-3.

Package C-State Entry and Exit

4.2.5.1 Package C0
The normal operating state for the processor. The processor remains in the normal
state when at least one of its cores is in the C0 or C1 state or when the platform has
not granted permission to the processor to go into a low power state. Individual cores
may be in lower power idle states while the package is in C0.
4.2.5.2 Package C1/C1E
No additional power reduction actions are taken in the package C1 state. However, if
the C1E substate is enabled, the processor automatically transitions to the lowest
supported core clock frequency, followed by a reduction in voltage. Autonomous power
reduction actions which are based on idle timers, can trigger depending on the activity
in the system.
The package enters the C1 low power state when:
Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
Datasheet Volume One
C0
C0
C0
C0
C1
C0
C3
C0
C6
C0
C3
Core 1
C1 C3
C0 C0
1 1
C1 C1
1
C1 C3
1
C1 C3
C1
C2
C6
C6
C0
1
C1
C3
C6
95