Dram Thermal Estimation Configuration Data - Intel Xeon Processor E5-1600 Datasheet

Table 2-6. RdPkgConfig() & WrPkgConfig() DRAM Thermal and Power Optimization
Services Summary (Sheet 2 of 2)
Index
Service Value
(decimal)
DRAM Power
Limit Data
Write / Read
34
DRAM Power
Limit Data
Write / Read
34
DRAM Power
Limit
Performance 38
Status Read
Notes:
1. Time, energy and power units should be assumed, where applicable, to be based on values returned by a read of the
PACKAGE_POWER_SKU_UNIT MSR or through the Package Power SKU Unit PCS read service.
2.5.2.6.2 DRAM Thermal Estimation Configuration Data Read/Write
This feature is relevant only when activity-based DRAM temperature estimation
methods are being utilized and would apply to all the DIMMs on all the memory
channels. The write allows the PECI host to configure the ' ' and ' ' variables in
Figure 2-12
T =
N
T and T
N
degrees Celsius, ' ' is the DRAM temperature decay factor, ' Energy' is the energy
difference between the current and previous memory transactions as determined by
the processor power control unit and ' ' is the DRAM energy-to-temperature translation
coefficient. The default value of ' ' is 0x3FF. ' ' is defined by the equation:
= (1 -
The 'Thermal Resistance' serves as a multiplier for translation of DRAM energy changes
to corresponding temperature changes and may be derived from actual platform
characterization data. The 'Scaling Factor' is used to convert memory transaction
information to energy units in Joules and can be derived from system/memory
configuration information. Refer to the Intel® 64 and IA-32 Architectures Software
Developer's Manual (SDM) Volumes 1, 2, and 3 for methods to program and access
'Scaling Factor' information.
Figure 2-12. DRAM Thermal Estimation Configuration Data
31
RESERVED
40
Parameter RdPkgConfig()
Value Data
(word) (dword)
0x0000 N/A
DRAM Plane Power
0x0000
Limit Data
Accumulated DRAM
0x0000
throttle time
for DRAM channel temperature filtering as per the equation below:
T + Energy
N-1
are the current and previous DRAM temperature estimates respectively in
N-1
Thermal Resistance)
20 19
Memory Thermal Estimation Configuration Data
WrPkgConfig()
Data
Description
(dword)
DRAM Plane Write DRAM
Power Limit Data Power Limit Data
Read DRAM
N/A
Power Limit Data
Read sum of all
time durations
N/A for which each
DIMM has been
Scaling Factor)
10
THETA VARIABLE
Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
Alternate Inband
MSR or CSR
Access
MSR 618h:
DRAM_POWER_LIMIT
CSR:
DRAM_PLANE_POWER_LIM
IT
MSR 618h:
DRAM_POWER_LIMIT
CSR:
DRAM_PLANE_POWER_LIM
IT
CSR:
DRAM_RAPL_PERF_STATUS
throttled
9
BETA VARIABLE
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