Xilinx LogiCORE IP Ethernet AVB Endpoint v2.4 User Manual page 69

MAC Header Filter Configuration
The MAC Header Filters can be enabled or disabled by using the
Register."
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Each of the eight MAC Header Filters can be separately configured (see
Filter
contains two 128-bit wide registers (16-bytes):
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The overall result of the Match Pattern Register and Match Enable Register is to provide a
highly configurable and flexible MAC Header matching logic as the
Filter Usage Examples"
Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
This contains a Promiscuous Mode bit, which:
when enabled allows all frames to be received on the Legacy Rx Traffic I/F.
when disabled only allows frames to be received on the Legacy Rx Traffic I/F that
contain a MAC Header that has matched at least one of the eight individual MAC
Header Filters.
Configuration"). As defined in this section, each of the eight MAC Header Filters
Match Pattern Register. This pattern is compared to the initial 128-bits received in the
Legacy Ethernet frame (bit 0 is the first bit within the frame to be received).
Match Enable Register. Each bit within this register refers to the same bit number
within the Match Pattern Register. When a bit in the Match Enable Register is set to:
♦
logic 1, the same bit number within the Match Pattern Register is compared with
the respective bit in the received frame and must match if the overall MAC
Header Filter is to obtain a match.
♦
logic 0, the same bit number within the Match Pattern Register is not compared.
This effectively turns the respective bit in the Match Pattern Register into a don't
care bit: the overall MAC Header Filter is capable of obtaining an overall match
even if this bit did not compare.
demonstrates.
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Rx Legacy Traffic I/F
"Rx Filtering Control
"MAC Header
"Single MAC Header
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