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Chapter 5: Core Architecture
Legacy Traffic Interface
Legacy Traffic Transmitter Path Signals
Table 5-2
used to transmit data from the legacy client logic into the core. All signals are synchronous
to the MAC transmitter clock, tx_clk, which must be qualified by the corresponding
clock enable, tx_clk_en (see
Table 5-2: Legacy Traffic Signals: Transmitter Path
Legacy Traffic Receiver Path Signals
Table 5-3
by the core to transfer data to the client. All signals are synchronous to the MAC receiver
clock, rx_clk, which must be qualified by the corresponding clock enable, rx_clk_en
(see
Table 5-3: Legacy Traffic Signals: Receiver Path
48
defines the core client-side legacy traffic transmitter signals. These signals are
Signal
legacy_tx_data[7:0]
legacy_tx_data_valid
legacy_tx_underrun
legacy_tx_ack
defines the core client side legacy traffic receiver signals. These signals are used
"Clocks and
Resets").
Signal
legacy_rx_data[7:0]
legacy_rx_data_valid
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"Clocks and
Resets").
Direction
Input
Frame data to be transmitted is supplied on
this port
Input
A data valid control signal for data on the
legacy_tx_data[7:0] port
Input
Asserted by the client to force the MAC to
corrupt the current frame
Output
Handshaking signal asserted when the
current data on legacy_tx_data[7:0]
has been accepted.
Direction
Output
Legacy frame data received is supplied
on this port.
Output
Control signal for the
legacy_rx_data[7:0] port
Description
Description
Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
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