Rtc Implementation - Xilinx LogiCORE IP Ethernet AVB Endpoint v2.4 User Manual

RTC Implementation

Increment of Nanoseconds Field
Figure 8-2
performed by the use of an implementation specific 20-bit sub-nanoseconds field as
illustrated. The nanoseconds and sub-nanoseconds fields can be considered to be
concatenated together.
All RTC logic within the core is synchronous to the RTC Reference Clock, rtc_clk.
X-Ref Target - Figure 8-2
Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
illustrates the implementation used to create the RTC nanoseconds field. This is
Nano Seconds (32 bits unsigned)
fill with zero's
Step 2
RTC Nano Seconds Offset (30 bits)
(written by processor)
Figure 8-2: Increment of Sub-nanoseconds and Nanoseconds Field
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Real Time Clock
Sub-Nano Seconds
(20 bits unsigned)
Step 1
RTC Increment Value (26 bits)
(written by processor)
controlled frequency RTC
Synchronised RTC
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