Customizing The Test Bench - Xilinx LogiCORE IP Ethernet AVB Endpoint v2.4 User Manual

Customizing the Test Bench

Simulation Run Time
The default simulation run time is set to only 40 microseconds, which can be easily
extended by editing the simulation_run_time constant, set near the top of the
demonstration test bench file. For example, from the VHDL file:
The test bench allows the DUT to run until the simulation time is exceeded; after this,
Ethernet frames already in the system are allowed to complete cleanly; then the test bench
reports the final statistics and end.
Changing Frame Data
The
and check different Ethernet frames by changing the parameters sent to them. These
parameters are set in the
Functional Simulation
modifications require logical changes, the
design before running a
Please see the
parameters. As an example, the following syntax is taken from the Verilog version of the
file and contains the syntax required to configure both the Legacy
Stimulus
Ethernet AVB Endpoint User Guide
UG492 September 21, 2010
----------------------------------------------------------------------
-- **** The following value determines the simulations run time ****
----------------------------------------------------------------------
constant simulation_run_time : time := 40000 ns;
Ethernet Frame Stimulus
Top-Level Example Design
to immediately use the new settings. However, because these
Timing
Top-Level Example Design HDL
and Ethernet Frame Checker
//---------------------------------
// Configure the Legacy frames used in this example design (the
// following parameters can be edited)
//---------------------------------
// Use minimum sized Ethernet frames (64-bytes total length)
parameter [10:0] LEGACY_FRAME_LENGTH
// Set the Destination Address to be AA-BB-CC-DD-EE-FF
parameter [47:0] LEGACY_DEST_ADDR
// Set the Destination Address to be 00-11-22-33-44-55
parameter [47:0] LEGACY_SRC_ADDR
// Do not use VLAN fields
parameter LEGACY_HAS_VLAN
// VLAN fields are not used so the following parameter is n/a
parameter [15:0] LEGACY_VLAN_DATA
// Use a Generic Type field
parameter [15:0] LEGACY_TYPE_FIELD
www.xilinx.com
and Ethernet Frame Checker
HDL. Editing this file allows a
Implementation Scripts
Simulation.
file for information about these frame-type
modules:
= 11'd64;
= 48'hFFEEDDCCBBAA;
= 48'h554433221100;
= 1'b0;
= 16'h0000;
= 16'h8000;
Example Design
modules can be set to produce
must be re-run on the
Ethernet Frame
157