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Chapter 5: Core Architecture
Table 5-9: PLB Signals (Cont'd)
54
PIN Name
PLB_wrPendPri[0:1]
PLB_reqPri[0:1]
Sl_addrAck
Sl_SSize[0:1]
Sl_wait
Sl_rearbitrate
Sl_wrDack
Sl_wrComp
Sl_WrBTerm
Sl_rdBus[0:31]
Sl_rdWdAddr[0:3]
Sl_rdDAck
Sl_rdComp
Sl_rdBTerm
Sl_MBusy[0:NUM_MASTERS-1]
Sl_MWrErr[0:NUM_MASTERS-1]
Sl_MRdErr[0:NUM_MASTERS-1]
Sl_MIRQ[0:NUM_MASTERS-1]
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Direction
Input
Unused. PLB pending read bus request
indicator.
Input
Unused. PLB request priority.
Output
Slave address acknowledge
Output
Slave data bus size.
Output
Slave wait indicator.
Output
Slave rearbitrate bus indicator. Not used,
tied to logic 0.
Output
Slave write data acknowledge
Output
Slave write transfer complete indicator
Output
Slave terminate write burst transfer.
Output
Slave read data bus
Output
Slave read word address
Output
Slave read data acknowledge
Output
Slave read transfer complete indicator
Output
Slave terminate read burst transfer.
Output
Slave busy indicator
Output
Unused, tied to logic 0. Slave write error
indicator.
Output
Unused, tied to logic 0. Slave read error
indicator.
Output
Unused, tied to logic 0. Slave interrupt
indicator.
Ethernet AVB Endpoint User Guide
Description
UG492 September 21, 2010
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