Xilinx LogiCORE IP Ethernet AVB Endpoint v2.4 User Manual page 170

Appendix A: RTC Time Stamp Accuracy
X-Ref Target - Figure A-3
TIMING CASE 1
MAC Tx/Rx clock
toggle
RTC Reference
Clock
Q0
Q1
Q2
Take RTC Sample
TIMING CASE 2
MAC Tx/Rx clock
toggle
RTC Reference
Clock
Q0
Q1
Q2
Take RTC Sample
170
clock boundary
clock boundary
Figure A-3: Sampling Position Uncertainty
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Sample
Sample
Sampling
uncertainty
Ethernet AVB Endpoint User Guide
UG492 September 21, 2010