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Electrical Specifications
Table 7-42.Processor Uncore I/O Buffer Supply DC Voltage and Current Specifications
Symbol
V
Voltage for the memory controller and
TT
shared cache defined at the
motherboard Vtt pinfield via
Voltage for the memory controller and
shared cache defined across
VTT_SENSE and VSS_SENSE_VTT
V
(DC+AC)
Processor I/O supply voltage for DDR3
DDQ
(DC + AC specification)
V
PLL supply voltage (DC + AC
CCPLL
specification)
TOL
V
Tolerance defined at the socket
TT
TT
motherboard VTT pinfield via
V
Tolerance defined across
TT
VTT_SENSE and VSS_SENSE_VTT
TOL
VDDQ Tolerance
DDQ
TOL
VCCPLL Tolerance
CCPLL
I
Max Current for V
CCMAX_VTT
SV
ULV
I
Max Current for V
CCMAX_VDDQ
I
CCMAX_VDDQ_CK
I
CCMAX_VTT0_DDR
I
Max Current for V
CCMAX_VCCPLL
I
Thermal Design Current
CCTDC_VTT
(TDC) for V
SV
ULV
I
Average Current for V
CCAVG_VDDQ
Standby
(Standby)
NOTES:
1.
The voltage specification requirements are defined across at the socket motherboard pinfield vias on the
bottom side of the baseboard.
2.
The voltage specification requirements are defined across VTT_SENSE and VSS_SENSE_VTT pins on the
bottom side of the baseboard.
3.
Defined at nominal VTT voltage
4.
These are pre-silicon estimates and are subject to change.
5.
Based on junction temperature of 50°C.
Datasheet
Parameter
Rail
TT
Rail
DDQ
Rail
CCPLL
Rail
TT
Rail during
DDQ
Min
Typ
Max
0.9975
1.05
1.1025
0.9765
1.05
1.1235
1.425
1.5
1.575
1.710
1.8
1.890
DC: ±2%
AC: ±3% including ripple
DC: ±2%
AC: ±5% including ripple
DC= ±3%
AC= ±2%
AC+DC= ±5%
AC+DC= ±5%
-
-
-
1.35
-
-
0.33
Unit
Note
V
1
V
2
V
V
%
1
2
%
%
18
A
3
16
3
A
0.2
A
4
2.6
A
4
A
A
3
18
16
A
5
97
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