Table of Contents
Advertisement
Electrical Specifications
Table 7-37.Market Segment Selection Truth Table for MSID[2:0]
MSID[2] MSID[1] MSID[0]
0
0
0
0
1
1
1
1
NOTES:
1.
MSID[2:0] signals are provided to indicate the maximum platform capability to the processor.
2.
MSID is used on rPGA988A platforms only.
3.
Processors specified for use with a -1.9 mΩ
7.5
Reserved or Unused Signals
The following are the general types of reserved (RSVD) signals and connection
guidelines:
•
RSVD - these signals should not be connected
•
RSVD_TP - these signals should be routed to a test point
•
RSVD_NCTF - these signals are non-critical to function and may be left un-
connected
Arbitrary connection of these signals to V
other signal (including each other) may result in component malfunction or
incompatibility with future processors. See
and the location of all reserved signals.
For reliable operation, always connect unused inputs or bi-directional signals to an
appropriate signal level. Unused active high inputs should be connected through a
resistor to ground (V
interfere with some Test Access Port (TAP) functions, complicate debug probing, and
prevent boundary scan testing. A resistor must be used when tying bi-directional
signals to power or ground. When tying any signal to power or ground, a resistor will
also allow for system testability. Resistor values should be within ±20% of the
impedance of the baseboard trace, unless otherwise noted in the appropriate platform
design guidelines. For details see
Datasheet
0
0
Reserved
0
1
Reserved
1
0
Reserved
1
1
Reserved
0
0
Standard Voltage (SV) 35-W Supported
0
1
Reserved
1
0
Reserved
1
1
Reserved
). Unused outputs maybe left unconnected; however, this may
SS
Table
1,2
Description
, V
, V
, V
, V
CC
TT
DDQ
CCPLL
Chapter 8
for a pin listing of the processor
7-45.
Notes
3
, V
, or to any
AXG
SS
89
Advertisement
Table of Contents
