Memory Reference And Compensation; Table 6-24 Memory Reference And Compensation - Intel PENTIUM P6000 - DATASHEET 2010 Datasheet

Table 6-23.Memory Channel B (Sheet 2 of 2)
Signal Name
SB_MA[15:0]
SB_CK[1:0]
SB_CK#[1:0]
SB_CKE[1:0]
SB_CS#[1:0]
SB_ODT[1:0]
6.2

Memory Reference and Compensation

Table 6-24.Memory Reference and Compensation
Signal Name
SM_RCOMP[2:0]
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
72
Description
Memory Address: These signals are used to
provide the multiplexed row and column
address to the SDRAM.
SDRAM Differential Clock: Channel B
SDRAM Differential clock signal pair. The
crossing of the positive edge of SB_CK and
the negative edge of its complement
SB_CK# are used to sample the command
and control signals on the SDRAM.
SDRAM Inverted Differential Clock:
Channel B SDRAM Differential clock signal-
pair complement.
Clock Enable: (1 per rank) Used to:
- Initialize the SDRAMs during power-up.
- Power-down SDRAM ranks.
- Place all SDRAM ranks into and out of self-
refresh during STR.
Chip Select: (1 per rank) Used to select
particular SDRAM components during the
active state. There is one Chip Select for
each SDRAM rank.
On Die Termination: Active Termination
Control.
Description
System Memory Impedance
Compensation:.
Memory Channel A/B DIMM Voltage.
Signal Description
Direction/
Buffer Type
O
DDR3
O
DDR3
O
DDR3
O
DDR3
O
DDR3
O
DDR3
Direction/Buffer
Type
I
A
O
A
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