Figure 2-2 Intel Flex Memory Technology Operation - Intel PENTIUM P6000 - DATASHEET 2010 Datasheet

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2.1.3.1
Single-Channel Mode
In this mode, all memory cycles are directed to a single-channel. Single-channel mode
is used when either Channel A or Channel B SO-DIMM connectors are populated in any
order, but not both.
2.1.3.2
Dual-Channel Mode - Intel® Flex Memory Technology Mode
The IMC supports Intel Flex Memory Technology Mode. This mode combines the
advantages of the Dual-Channel Symmetric (Interleaved) and Dual-Channel
Asymmetric Modes. Memory is divided into a symmetric and a asymmetric zone. The
symmetric zone starts at the lowest address in each channel and is contiguous until the
asymmetric zone begins or until the top address of the channel with the smaller
capacity is reached. In this mode, the system runs with one zone of dual-channel mode
and one zone of single-channel mode, simultaneously, across the whole memory array.
Figure 2-2. Intel Flex Memory Technology Operation
2.1.3.2.1
Dual-Channel Symmetric Mode
Dual-Channel Symmetric mode, also known as interleaved mode, provides maximum
performance on real world applications. Addresses are ping-ponged between the
channels after each cache line (64-byte boundary). If there are two requests, and the
second request is to an address on the opposite channel from the first, that request can
be sent before data from the first request has returned. If two consecutive cache lines
are requested, both may be retrieved simultaneously, since they are ensured to be on
opposite channels. Use Dual-Channel Symmetric mode when both Channel A and
Channel B SO-DIMM connectors are populated in any order, with the total amount of
memory in each channel being the same.
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C
B
B
C H A
C H B
C
B
B
C H A
C H B
B – T h e la rg e s t p h y s ic a l m e m o ry a m o u n t o f th e s m a lle r s iz e m e m o ry m o d u le
C – T h e re m a in in g p h y s ic a l m e m o ry a m o u n t o f th e la rg e r s iz e m e m o ry m o d u le
T O M
N o n in te r le a v e d
C
a c c e s s
B
D u a l c h a n n e l
in te r le a v e d a c c e s s
B
Interfaces
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