Smbus Dc Specifications; Lvttl Signal Dc Specifications; System Bus Clock Differential Hstl Ac Specifications - Intel P9500 - Core 2 Duo 2.53 GHz 6M L2 Cache 1066MHz FSB Socket P Mobile Processor Manual

Table 2-8.

SMBus DC Specifications

Symbol
3.3V
V
IL
V
IH
V
OL
I
3.3V
I
OL
I
OL2
I
LI
I
LO
Notes:
1. The value specified for I
2. The value specified for I
Table 2-9.

LVTTL Signal DC Specifications

Symbol
V
IL
V
IH
V
OL
V
OH
Table 2-10
SMBus (timing diagrams begin with
clocking scheme with a frequency of 200, 266, or 333 MHz. The SMBus is a subset of
the I2C* interface which supports operation of up to 100 kHz.
Table 2-10.System Bus Clock Differential HSTL AC Specifications (Sheet 1 of 2)
Symbol Parameter
T BCLKp Period
period
T System Clock Skew
skew
f BCLKp Frequency
BCLK
T BCLKp Input Jitter
jitter
T BCLKp High Time
high
T BCLKp Low Time
low
T BCLKp Period
period
T System Clock Skew
skew
f BCLKp Frequency
BCLK
T BCLKp Input Jitter
jitter
T BCLKp High Time
high
T BCLKp Low Time
low
20
Parameter
V for the System Management
CC
Components
Input Low Voltage
Input High Voltage
Output Low Voltage
3.3V Supply Current
Output Low Current
Output Low Current
Input Leakage Current
Output Leakage Current
applies to all signals except for THRMALERT#.
OL
applies only to THRMALERT#, which is an open drain signal.
OL2
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
through Table 2-11 list the AC specifications for the processor's clock and
System
Bus
Minimum
Clock
(MHz)
200
200
200
200
200
200
266
266
266
266
266
266
Dual-Core Intel
Minimum Typ
3.14 3.3
–0.3
2.31
5.0
6
Minimum
2.0
2.4
Figure 2-1). The processor uses a differential HSTL
Typ Maximum
5.0
100
200 200
100
2.25 2.5 2.75
2.25 2.5 2.75
3.75
60
266 266
50
1.69 1.88 2.06
1.69 1.88 2.06
® ®
Itanium Processor 9000 and 9100 Series Datasheet
Electrical Specifications
Maximum Unit Notes
3.47 V 3.3 V ±5
0.3*3.3 V V
3.47 V Max =
3.3 +5%
Min +
0.7*3.3V
0.4 V
30.0 mA
3 mA
mA
10 µA
10 µA
Maximum Unit Notes
0.8 V
3.63 V
0.4 V
V
Unit Figure Notes
ns Figure 2-1
ps
MHz Figure 2-1
ps Figure 2-1
ns Figure 2-1
ns Figure 2-1
ns Figure 2-1
ps
MHz Figure 2-1
ps Figure 2-1
ns Figure 2-1
ns Figure 2-1
1
2
1
2
3
4
4
5
2
3
4
4