Processor Information Rom; Eeprom Smbus Addressing On The Dual-Core Intel; Processor Information Rom Format - Intel P9500 - Core 2 Duo 2.53 GHz 6M L2 Cache 1066MHz FSB Socket P Mobile Processor Manual

Table 6-3.

EEPROM SMBus Addressing on the Dual-Core Intel

and 9100 Series
Address
(Hex)
A0h/A1h
A2h/A3h
A4h/A5h
A6h/A7h
A8h/A9h
AAh/ABh
ACh/ADh
AEh/AFh
Notes:
1. Although this addressing scheme is targeted for up to four-way MP systems, more processors can be supported
by using a multiplexed (or separate) SMBus implementation.
6.2

Processor Information ROM

An electrically programmed read-only memory (ROM) provides information about the
processor. The checksum bits for each category provide error correction and serve as a
mechanism to check whether data is corrupted or not. This information is permanently
write-protected.
Note: The data, in byte format, is written and read serially, with the most significant bit first.
Table 6-4. Processor Information ROM Format (Sheet 1 of 3)
Offset/
Section
Header
00h
01h
03h
04h
05h
06h
07h
08h
09h
0Ah
82
Upper
Processor Select
1
Address
(SMA1) (SMA0)
Bits 7–4
Bit 3 Bit 2
1010 0
1010 0
1010 0
1010 0
1010 1
1010 1
1010 1
1010 1
Table 6-4 shows the data fields and formats provided in the memory.
# of
Function
Bits
8 Data Format Revision
16 EEPROM Size
8 Processor Data Address
8 Processor Core Address
8 Processor Cache Address
8 Processor Data Address
8 Part Number Data Address
8 Thermal Reference Data
Address
8 Feature Data Address
8 Other Data Address
Dual-Core Intel
System Management Feature Specifications
®
Memory
Read/
Device
Write
Select
Bit 1 Bit 0
0 0 X
0 1 X
1 0 X
1 1 X
0 0 X
0 1 X
1 0 X
1 1 X
Notes
Two 4-bit hex digits
Size in bytes (MSB first)
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
® ®
Itanium Processor 9000 and 9100 Series Datasheet
®
Itanium Processor 9000
Device Addressed
Scratch EEPROM 1
Processor Information ROM 1
Scratch EEPROM 2
Processor Information ROM 2
Scratch EEPROM 3
Processor Information ROM 3
Scratch EEPROM 4
Processor Information ROM 4
Examples
Start with 00h
Use a decimal to hex
transfer; 128 bytes =
0080h:
• 02h[7:4] = 0000
• 02h[3:0] = 0000
• 01h[7:4] = 1000
• 01h[3:0] = 0000
0Eh
17h
28h
37h
3Eh
63h
67h
7Ah