Intel Itanium 9040 Processor Upgrade Manuals

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Intel Itanium 9040 Manual

Intel Itanium 9040 Manual (108 pages)

Dual-Core Intel Itanium Processor 9000 and 9100 Series

Brand: Intel | Category: Computer Hardware | Size: 1 MB

Table of Contents

Table of Contents
3
Revision History
8
Product Features
9
1 Introduction

11
- Overview
  11
- Processor Abstraction Layer
  11
- Mixing Processors of Different Frequencies and Cache Sizes
  12
- Terminology
  12
- State of Data
  12
- Reference Documents
  13
2 Electrical Specifications

15
3 Pinout Specifications

35
4 Mechanical Specifications

65
5 Thermal Specifications

75
6 System Management Feature Specifications

79
- System Management Bus
  79
  - System Management Bus Interface
    79
  - System Management Interface Signals
    79
- System Management Interface Signal Descriptions
  79
  - Logical Schematic of Smbus Circuitry
    80
    
    Smbus Device Addressing
    81
- Thermal Sensing Device Smbus Addressing on the Dual-Core Intel
  81
  - Processor Information ROM
    82
- EEPROM Smbus Addressing on the Dual-Core Intel
  82
- Processor Information ROM Format
  82
  - Scratch EEPROM
    85
- Processor Information ROM and Scratch EEPROM Supported Smbus Transactions
  85
- Current Address Read Smbus Packet
  85
- Thermal Sensing Device
  86
- Random Address Read Smbus Packet
  86
- Byte Write Smbus Packet
  86
- Thermal Sensing Device Supported Smbus Transactions
  87
- Write Byte Smbus Packet
  87
- Read Byte Smbus Packet
  87
- Send Byte Smbus Packet
  87
- Receive Byte Smbus Packet
  87
- ARA Smbus Packet
  87
- Thermal Sensing Device Registers
  88
  - Thermal Reference Registers
    88
- Command Byte Bit Assignment
  88
  - Thermal Limit Registers
    89
  - Status Register
    89
  - Configuration Register
    89
- Thermal Sensing Device Status Register
  89
- Thermal Sensing Device Configuration Register
  89
  - Conversion Rate Register
    90
- Thermal Sensing Device Conversion Rate Register
  90
- Signals Reference
  91
- Alphabetical Signals Reference
  91
  - A[49:3]# (I/O)
    91
  - A20M# (I)
    91
  - Ads# (I/O)
    91
  - Ap[1:0]# (I/O)
    91
  - Asz[1:0]# (I/O)
    91
  - Attr[3:0]# (I/O)
    92
  - Bclkp/Bclkn (I)
    92
  - Be[7:0]# (I/O)
    92
- Address Space Size
  92
- Effective Memory Type Signal Encoding
  92
  - Berr# (I/O)
    93
- Special Transaction Encoding on Byte Enables
  93
  - Binit# (I/O)
    94
  - Bnr# (I/O)
    94
  - Bpm[5:0]# (I/O)
    94
  - Bpri# (I)
    94
  - BR[0]# (I/O) and BR[3:1]# (I)
    94
  - Breq[3:0]# (I/O)
    95
- BR0# (I/O), BR1#, BR2#, BR3# Signals for 2P Rotating Interconnect
  95
- BR0# (I/O), BR1#, BR2#, BR3# Signals for 4P Rotating Interconnect
  95
- BR[3:0]# Signals and Agent Ids
  95
  - Ccl# (I/O)
    96
  - Cpupres# (O)
    96
  - D[127:0]# (I/O)
    96
  - D/C# (I/O)
    96
  - Dbsy# (I/O)
    96
  - Dbsy_C1# (O)
    96
  - Dbsy_C2# (O)
    96
  - Defer# (I)
    96
  - Den# (I/O)
    97
  - Dep[15:0]# (I/O)
    97
  - Dhit# (I)
    97
- DID[9:0]# Encoding
  97
  - Dps# (I/O)
    98
  - Drdy# (I/O)
    98
  - Drdy_C1# (O)
    98
  - Drdy_C2# (O)
    98
  - Dsz[1:0]# (I/O)
    98
  - Exf[4:0]# (I/O)
    98
- Itanium ® Processor
  98
- Extended Function Signals
  98
  - Fcl# (I/O)
    99
  - Ferr# (O)
    99
  - Gseq# (I)
    99
  - HIT# (I/O) and HITM# (I/O)
    99
  - Ids# (I)
    99
  - Ignne# (I)
    99
  - Init# (I)
    99
  - Int (I)
    100
  - Len[2:0]# (I/O)
    100
  - Lint[1:0] (I)
    100
    
    Lock# (I/O)
    100
- Length of Data Transfers
  100
  - Nmi (I)
    101
  - Own# (I/O)
    101
  - Pmi# (I)
    101
  - Pwrgood (I)
    101
  - Req[5:0]# (I/O)
    101
  - Reset# (I)
    102
  - Rp# (I/O)
    102
- Transaction Types Defined by Reqa#/Reqb# Signals
  102
  - Rsp# (I)
    103
  - Sbsy# (I/O)
    103
  - Sbsy_C1# (O)
    103
  - Sbsy_C2# (O)
    103
  - Splck# (I/O)
    103
  - Stbn[7:0]# and Stbp[7:0]# (I/O)
    103
  - Tck (I)
    104
  - Tdi (I)
    104
  - Tdo (O)
    104
  - Thrmtrip# (O)
    104
  - Thrmalert# (O)
    104
  - Tms (I)
    104
  - Tnd# (I/O)
    104
- Stbp[7:0]# and Stbn[7:0]# Associations
  104
  - Trdy# (I)
    105
  - Trst# (I)
    105
  - Wsnp# (I/O)
    105
  - Signal Summaries
    105
- Output Signals
  105
- Input Signals
  105
- Input/Output Signals (Single Driver)
  106
- Input/Output Signals (Multiple Driver)
  107

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