Platform Environmental Control Interface (Peci) Dc Specifications; Cmos Signal Input/Output Group Dc Specifications; Open Drain Signal Group Dc Specifications; Smbus Signal Group Dc Specifications - Intel BFCBASE - Motherboard - 7300 Datasheet

Data sheet
Table of Contents

Advertisement

Electrical Specifications
Table 2-12. CMOS Signal Input/Output Group DC Specifications
Symbol
V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
LI
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
TT
3.
Refer to the processor I/O Buffer Models for I/V characteristics.
4.
Measured at 0.1*V
5.
Measured at 0.9*V
6.
For Vin between 0 V and V
7.
This is the measurement at the pin.
Table 2-13. Open Drain Signal Group DC Specifications
Symbol
V
OL
V
OH
I
OL
I
LO
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
Measured at 0.2*V
3.
V
is determined by value of the external pullup resistor to V
OH
details.
4.
For V
IN
5.
This is the measurement at the pin.
Table 2-14. SMBus Signal Group DC Specifications
Symbol
V
IL
V
IH
V
OL
I
OL
I
LI
I
LO
C
SMB
Notes:
1.
These parameters are based on design characterization and are not tested.
2.
All DC specifications for the SMBus signal group are measured at the processor pins.
3.
Platform designers may need this value to calculate the maximum loading of the SMBus and to determine
maximum rise and fall times for SMBus signals.
2.11.2
Platform Environmental Control Interface (PECI) DC
Specifications
PECI is an Intel proprietary one-wire bus interface that provides a communication
channel between Intel processor and external thermal monitoring devices. The Dual-
Core Intel® Xeon® Processor 7200 Series and Quad-Core Intel® Xeon® Processor
Document Number: 318080-002
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Current
Output High Current
Input Leakage Current
referred to in these specifications refers to instantaneous V
.
TT
.
TT
. Measured when the driver is tristated.
TT
Parameter
Output Low Voltage
Output High Voltage
Output Low Current
Leakage Current
.
TT
between 0 V and V
.
OH
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
Output Low Current
Input Leakage Current
Output Leakage Current
SMBus Pin Capacitance
Min
Typ
-0.10
0.00
0.7*V
V
TT
TT
-0.10
0
0.9*V
V
TT
TT
1.70
N/A
1.70
N/A
N/A
N/A
TT
Min
Typ
N/A
V
-5%
V
TT
TT
16
N/A
N/A
N/A
. Please refer to platform design guide for
TT
Min
-0.30
0.30 * SM_VCC
0.70 * SM_VCC
3.465
0
0.400
N/A
±
N/A
±
N/A
Max
Units
Notes
0.3*V
V
TT
V
+0.1
V
TT
0.1*V
V
TT
V
+0.1
V
TT
4.70
mA
4.70
mA
+/- 100
μA
.
Max
Units
Notes
0.20
V
V
+5%
V
TT
50
mA
+/- 200
μA
Max
Unit
Notes
V
V
V
3.0
mA
10
µA
10
µA
15.0
pF
1
2,3
2
2
2
4
5
6,7
1
3
2
4,5
1, 2
3
35

Advertisement

Table of Contents
loading

This manual is also suitable for:

Xeon 7300 seriesXeon 7200 series

Table of Contents