Voltage Regulator Connector Signals; Wired-Or Signal Group (Binit#, Hit#, Hitm#, Bnr#, Tnd#, Berr#) Overshoot/Undershoot Tolerance For 533-Mhz System Bus; Vr Connector Signals - Intel P9500 - Core 2 Duo 2.53 GHz 6M L2 Cache 1066MHz FSB Socket P Mobile Processor Manual
Dual-core intel itanium processor 9000 and 9100 series
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Also See for P9500 - Core 2 Duo 2.53 GHz 6M L2 Cache 1066MHz FSB Socket P Mobile Processor:
- Datasheet (113 pages)
Table of Contents
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Electrical Specifications
Table 2-16. Source Synchronous AGTL+ Signal Group Time-Dependent Overshoot/
Undershoot Tolerance for 533-MHz System Bus (Sheet 2 of 2)
Absolute
Maximum (V)
1.4
1.35
1.3
Notes:
1. Activity Factor = 1 means signal toggles every 3.75 ns.
Table 2-17. Wired-OR Signal Group (BINIT#, HIT#, HITM#, BNR#, TND#, BERR#)
Overshoot/Undershoot Tolerance for 533-MHz System Bus
Absolute
Maximum (V)
Over-
shoot
1.65
1.6
1.55
1.5
1.45
1.4
1.35
Notes:
1. Activity Factor = 1 means signal toggles every 7.5 ns.
2.6
Voltage Regulator Connector Signals
The VR module consists of three DC-DC converters, V
Table 2-18
connector.
Table 2-18. VR Connector Signals
Group Name
Voltage Regulator
Connector
Warning:
If the VR cannot supply the voltages requested by the components in the processor
package, then it must disable itself.
Figure 2-4
power tab connector signals.
®
®
Dual-Core Intel
Itanium
Processor 9000 and 9100 Series Datasheet
–0.2
0.9925
1.3358
–0.15
1.875
1.875
–0.10
1.875
1.875
Under-
1
AF = 1
AF = 0.75
shoot
–0.45
0.01248
0.0144
–0.4
0.0380
0.0507
-0.35
0.1250
0.1668
–0.3
0.4054
0.5424
–0.25
1.3013
1.7396
-0.2
3.75
3.75
–0.15
3.75
3.75
lists all of the signals which are part of the processor package VR output
PPODGD#, CPUPRES#, GND, Vid_valid, Vid_Core[5:0],
Vid_cache [5:0], Vcache_sense, Gnd_sense, Vcore_sense,
Vfixed_sense, OUTEN.
shows the top view of the processor package power tab. See
Pulse Duration (ns)
1.875
1.875
1.875
1.875
1.875
1.875
1.875
1.875
1.875
Pulse Duration (ns)
AF = 0.5
AF = 0.25
AF = 0.1
0.0230
0.0461
0.1155
0.0763
0.1522
0.3814
0.2507
0.5004
1.2537
0.8163
1.6302
3.75
2.6246
3.75
3.75
3.75
3.75
3.75
3.75
3.75
3.75
, V
core
cache
Signals
1.875
1.875
1.875
1.875
1.875
1.875
AF = 0.05
AF = 0.01
0.2301
1.1530
0.7627
3.75
2.5059
3.75
3.75
3.75
3.75
3.75
3.75
3.75
3.75
3.75
, and V
.
fixed
Table 2-19
for
27
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