Tck (I); Tdi (I); Tdo (O); Thrmtrip# (O) - Intel P9500 - Core 2 Duo 2.53 GHz 6M L2 Cache 1066MHz FSB Socket P Mobile Processor Manual

Table A-11. STBp[7:0]# and STBn[7:0]# Associations
Strobe Bits
STBp[7]#, STBn[7]#
STBp[6]#, STBn[6]#
STBp[5]#, STBn[5]#
STBp[4]#, STBn[4]#
STBp[3]#, STBn[3]#
STBp[2]#, STBn[2]#
STBp[1]#, STBn[1]#
STBp[0]#, STBn[0]#
A.1.60

TCK (I)

The Test Clock (TCK) signal provides the clock input for the IEEE 1149.1 compliant TAP.
A.1.61

TDI (I)

The Test Data In (TDI) signal transfers serial test data into the processor. TDI provides
the serial input needed for IEEE 1149.1 compliant TAP.
A.1.62

TDO (O)

The Test Data Out (TDO) signal transfers serial test data out from the processor. TDO
provides the serial output needed for IEEE 1149.1 compliant TAP.
A.1.63

THRMTRIP# (O)

The Thermal Trip (THRMTRIP#) signal protects the processor from catastrophic
overheating by use of an internal thermal sensor. This sensor is set well above the
normal operating temperature to ensure that there are no false trips. Data will be lost if
the processor goes into thermal trip (signaled to the system by the assertion of the
THRMTRIP# signal). Once THRMTRIP# is asserted, the platform must assert RESET# to
protect the physical integrity of the processor.
A.1.64

THRMALERT# (O)

THRMALERT# is asserted when the measured temperature from the processor thermal
diode equals or exceeds the temperature threshold data programmed in the high-temp
(THIGH) or low-temp (TLOW) registers on the sensor. This signal can be used by the
platform to implement thermal regulation features.
A.1.65

TMS (I)

The Test Mode Select (TMS) signal is an IEEE 1149.1 compliant TAP specification
support signal used by debug tools.
A.1.66

TND# (I/O)

The TLB Purge Not Done (TND#) signal is asserted to delay completion of a TLB Purge
instruction, even after the TLB Purge transaction completes on the system bus.
104
Data Bits
D[127:112]#
D[111:96]#
D[95:80]#
D[79:64]#
D[63:48]#
D[47:32]#
D[31:16]#
D[15:0]#
® ®
Dual-Core Intel Itanium
Signals Reference
ECC Bits
DEP[15:14]#
DEP[13:12]#
DEP[11:10]#
DEP[9:8]#
DEP[7:6]#
DEP[5:4]#
DEP[3:2]#
DEP[1:0]#
Processor 9000 and 9100 Series Datasheet