Table 12. Voltage Regulation Limits; Table 13. Transient Load Requirements - Intel SC5299BRP Technical Product Specification

Entry server chassis
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Power Sub-system
2.1.5.5
Voltage Regulation
The power supply output voltages are within the following voltage limits when operating at
steady state and dynamic loading conditions. These limits include the peak-peak ripple/noise.
All outputs are measured with reference to the return remote sense signal (ReturnS). The 5V,
12V1, 12V2, –12V and 5VSB outputs are measured at the power supply connectors referenced
to ReturnS. The +3.3V is measured at the remote sense signal (3.3VS) located at the signal
connector.
Parameter
+ 3.3V
+ 5V
+ 12V1
+ 12V2
- 12V
+ 5VSB
2.1.5.6
Dynamic Loading
The output voltages are within limits specified for the step loading and capacitive loading
specified in the following table. The
MAX load conditions.
Parameter
+12V1DC
+12V2DC
+5VDC
+3.3VDC
+5VSB
18

Table 12. Voltage Regulation Limits

Tolerance
MIN
- 5%/+5%
+3.135
- 4%/+5%
+4.80
- 5%/+5%
+11.40
- 5%/+5%
+11.40
- 5%/+4%
-11.52
- 4%/+5%
+4.80
step load may occur anywhere within the MIN load to the

Table 13. Transient Load Requirements

Output Range
0.5A TO 18A
0.5A TO 15A
2A TO 20A
0.5A TO 17A
0.1A TO 2.0A
Intel order number D37594-005
®
Intel
Entry Server Chassis SC5299-E TPS
NOM
MAX
+3.30
+3.47
+5.00
+5.25
+12.00
+12.60
+12.00
+12.60
-12.00
-12.60
+5.00
+5.25
MAX Step
Voltage Overshoot/Undershoot
6A
350mV (700mVpk-pk)
6A
350mV (700mVpk-pk)
5A
200mV(400mVpk-pk)
6A
200mV (400mVpk-pk)
0.7A
250mV(500mVpk-pk)
Units
V
rms
V
rms
V
rms
V
rms
V
rms
V
rms
Revision 3.1

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