Figure 19. Output Voltage Timing; Table 123. Output Voltage Timing - Intel SC5299BRP Technical Product Specification

®
Intel Entry Server Chassis SC5299-E TPS
2.5.8.14 Timing Requirements
The timing requirements for power supply operation are as follows. The output voltages must
rise from 10% to within regulation limits (T
allowed to rise from 1.0 to 25 ms. The +3.3V, +5V and +12V output voltages should start to rise
approximately at the same time. All outputs must rise monotonically. Each output voltage shall
reach regulation within 50ms (T
output voltage shall fall out of regulation within 400msec (T
The following table shows the timing requirements for the power supply being turned on and off
via the AC input, with PSON held low and the PSON signal, with the AC input applied.
Item
T Output voltage rise time from each main output.
vout_rise
T All main outputs must be within regulation of each
vout_on
other within this time.
T All main outputs must leave regulation within this
vout_off
time.
1. The 5VSB output voltage rise time shall be from 1.0 ms to 25 ms.
V out
10% V out
V1
V2
V3
V4
Revision 3.1
) within 5 to 70 ms, except for 5VSB, which is
vout_rise
) of each other during turn on of the power supply. Each
vout_on

Table 123. Output Voltage Timing

Description
T vout_rise
T vout_on

Figure 19. Output Voltage Timing

Intel order number D37594-005
Power Sub-system
) of each other during turn off.
vout_off
MIN MAX
1 1
5.0 70
50
400
T vout_off
Units
msec
msec
msec
TP02313
99