Figure 13. Output Voltage Timing; Figure 15. Output Voltage Timing; Table 63. Output Voltage Timing - Intel SC5299BRP Technical Product Specification

®
Intel Entry Server Chassis SC5299-E TPS
2.3.3.13 Timing Requirements
The timing requirements for power supply operation are as follows. The output voltages must
rise from 10% to within regulation limits (T
allowed to rise from 1.0 to 25 ms. All outputs rise monotonically. The following figure shows the
timing requirements for the power supply being turned on and off via the AC input, with PSON
held low and the PSON signal, with the AC input applied.
Item
T Output voltage rise time from each main output.
vout_rise
T All main outputs must be within regulation of each
vout_on
other within this time.
T All main outputs must leave regulation within this
vout_off
time.
* The 5VSB output voltage rise time shall be from 1.0 ms to 25.0 ms.
V out
10% V out
V1
V2
V3
V4
Revision 3.1
) within 5 to 70 ms, except for 5VSB, which is
vout_rise

Table 63. Output Voltage Timing

Description
T vout_rise
T vout_on

Figure 13. Output Voltage Timing

Intel order number D37594-005
Power Sub-system
Minimum Maximum
5.0* 70*
50
400
T vout_off
Units
msec
msec
msec
TP02313
55