Table 90. Turn On/Off Timing - Intel SC5299BRP Technical Product Specification

Entry server chassis
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Intel
Entry Server Chassis SC5299-E TPS
V out
10% V out
V1
V2
V3
V4
Item
T
Delay from AC being applied to 5VSB being within
sb_on_delay
regulation.
T
Delay from AC being applied to all output voltages
ac_on_delay
being within regulation.
T
Time all output voltages stay within regulation after
vout_holdup
loss of AC.
T
Delay from loss of AC to de-assertion of PWOK
pwok_holdup
T
Delay from PSON
pson_on_delay
regulation limits.
T
Delay from PSON
pson_pwok
asserted.
T
Delay from output voltages within regulation limits to
pwok_on
PWOK asserted at turn on.
Revision 3.1
T vout_rise
T vout_on
Figure 15. Output Voltage Timing

Table 90. Turn On/Off Timing

Description
#
active to output voltages within
#
deactive to PWOK being de-
Intel order number D37594-005
Power Sub-system
T vout_off
Loading
Minimum
60%
21
60%
20
5
100
TP02313
Maximum
Units
ms
1500
ms
2500
ms
ms
ms
400
ms
50
ms
500
73

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