Qspi Flash - Alinx AX7Z035B User Manual

PL_DDR3_A8
PL_DDR3_A9
PL_DDR3_A10
PL_DDR3_A11
PL_DDR3_A12
PL_DDR3_A13
PL_DDR3_A14
PL_DDR3_BA0
PL_DDR3_BA1
PL_DDR3_BA2
PL_DDR3_S0
PL_DDR3_RAS
PL_DDR3_CAS
PL_DDR3_WE
PL_DDR3_ODT
PL_DDR3_RESET
PL_DDR3_CLK0_P
PL_DDR3_CLK0_N
PL_DDR3_CKE

2.4 QSPI Flash

The board is equipped with two 256MBit Quad-SPI FLASH chips to form an
8-bit bandwidth data bus, the FLASH model is W25Q256FVEI, which uses the 3.3V
CMOS voltage standard. Due to the non-volatile nature of QSPI FLASH, it can be
used as a boot device for the system to store the boot image of the system.
These images mainly include FPGA bit files, ARM application code, and other user
data files. The specific models and related parameters of QSPI FLASH are shown
in Table 2-4-1.
Bit Number
U13, U14
Table 2-4-1: QSPI FLASH specification and parameters
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IO_L12N_T1_MRCC_34
IO_L18N_T2_34
IO_L24N_T3_34
IO_L11P_T1_SRCC_34
IO_L23N_T3_34
IO_L16P_T2_34
IO_L12P_T1_MRCC_34
IO_L18P_T2_34
IO_L19N_T3_VREF_34
IO_L22N_T3_34
IO_L14N_T2_SRCC_34
IO_L19P_T3_34
IO_L20N_T3_34
IO_L20P_T3_34
IO_L22P_T3_34
IO_L16N_T2_34
IO_L21P_T3_DQS_34
IO_L21N_T3_DQS_34
IO_L24P_T3_34
Model
W25Q256FVEI
AX7Z035B User Manual
B10
A10
Capacity Manufacturer
256M bit Winbond
www.alinx.com
F7
A7
A2
F8
B1
G7
B7
C3
A3
C6
C4
B4
B5
A4
B6
A5
B2