Figure 5-4: 50Mhz active crystal oscillator on the FPGA board
PL Clock pin assignment:
Part 6:ZYNQ Processor System (PS) peripherals
ZYNQ is composed of the PS part of the ARM system and the PL part of
the FPGA logic. Some peripherals on the development board are connected to
the IO of the PS, and some peripherals are connected to the IO of the PL. First
introduce the peripherals connected to the PS part.
Part 6.1: QSPI Flash
The AX7020 FPGA development board is equipped with a 256MBit
Quad-SPI FLASH chip, model W25Q256, which uses the 3.3V CMOS voltage
standard. Due to the non-volatile nature of QSPI FLASH, it can be used as a
boot device for the system to store the boot image of the system. These
images mainly include FPGA bit files, ARM application code, and other user
data files. The specific models and related parameters of QSPI FLASH are
shown in Table 6-1.
Position
U6
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ZYNQ FPGA Development Board AX7020 User Manual
Signal Name
PL_GCLK
Model
W25Q256BV
Table 6-1: QSPI FLASH Specification
ZYNQ Pin
U18
Capacity
32M Byte
Factory
Winbond
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