Alinx AX7Z035B User Manual page 18

AX7Z035B User Manual
QSPI FLASH is connected to the GPIO port of the PS BANK500 of the ZYNQ chip.
In the system design, the functions of these PS GPIO ports need to be configured as
the QSPI FLASH interfaces. Figure 2-4-1 shows the QSPI Flash in the schematic.
Configuration chip pin assignment:
Signal Name
QSPI0_SCK
QSPI0_CS
QSPI0_D0
QSPI0_D1
QSPI0_D2
QSPI0_D3
QSPI1_SCK
QSPI1_CS
QSPI1_D0
QSPI1_D1
QSPI1_D2
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Figure 2-4-1: QSPI Flash connection diagram
ZYNQ Pin Name
PS_MIO6_500
PS_MIO1_500
PS_MIO2_500
PS_MIO3_500
PS_MIO4_500
PS_MIO5_500
PS_MIO9_500
PS_MIO0_500
PS_MIO10_500
PS_MIO11_500
PS_MIO12_500
ZYNQ Pin No.
F23
D26
E25
D25
F24
C26
D24
E26
A25
B26
A23
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