Alinx AX7Z035B User Manual page 39

Zynq7000 fpga development board
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AX7Z035B User Manual
U1
U13
PHY1_TXCK
PHY1_TXCTL
PHY1_TXD0~PHY1_TXD3
PHY1_RXCK
ZYNQ
GPHY
PHY1_RXCTL
(JL2121)
PHY1_TXD0~PHY1_RXD3
PHY1_MDC
PHY1_MDIO
PHY1_RESET
Figure 3-3-1: Connection between ZYNQ PS system and GPHY
Figure 3-3-2 shows the connection diagram of the ZYNQ PL Ethernet PHY chip:
Figure 3-3-2: Connection between ZYNQ PL and GPHY
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