Part 5: Qspi Flash - Alinx KINTEX-7FPGA User Manual

DIMM_DDR3_A12
DIMM_DDR3_A13
DIMM_DDR3_A14
DIMM_DDR3_A15
DIMM_DDR3_BA0
DIMM_DDR3_BA1
DIMM_DDR3_BA2
DIMM_DDR3_WE
DIMM_DDR3_RAS
DIMM_DDR3_CAS
DIMM_DDR3_S0
DIMM_DDR3_S1
DIMM_DDR3_CKE0
DIMM_DDR3_CKE1
DIMM_DDR3_ODT0
DIMM_DDR3_ODT1
DIMM_DDR3_CLK0_P
DIMM_DDR3_CLK0_N
DIMM_DDR3_CLK1_P
DIMM_DDR3_CLK1_N
DIMM_DDR3_RESET

Part 5: QSPI Flash

The AX7325B FPGA development board is equipped with one128MBit
Quad-SPI FLASH, and the model is N25Q128, which uses the 3.3V CMOS
voltage standard. Due to the non-volatile nature of QSPI FLASH, it can store
FPGA configuration Bin files and other user data files in use. The specific
models and related parameters of QSPI FLASH are shown in Table 5-1.
Position
U7
QSPI FLASH is connected to the dedicated pins of BANK0 and BANK14 of
www.alinx.com
KINTEX-7 FPGA Development Board AX7325B User Manual
IO_L1P_T0_17
IO_L9P_T1_DQS_17
IO_L15P_T2_DQS_17
IO_L5N_T0_17
IO_L4N_T0_17
IO_L2P_T0_17
IO_L3P_T0_DQS_17
IO_L7P_T1_17
IO_L2N_T0_17
IO_L6N_T0_VREF_17
IO_L9N_T1_DQS_17
IO_L8N_T1_17
IO_L5P_T0_17
IO_L18P_T2_17
IO_L10P_T1_17
IO_L7N_T1_17
IO_L12P_T1_MRCC_17
IO_L12N_T1_MRCC_17
IO_L14P_T2_SRCC_17
IO_L14N_T2_SRCC_17
IO_L18N_T2_17
Model
N25Q128
Table 5-1: QSPI FLASH Specification
K18
G22
D16
L18
H19
H20
J17
H21
G20
K20
F22
C21
L17
G17
D22
H22
D17
D18
E19
D19
F17
Capacity
128M Bit
Factory
Numonyx
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